In the numerous electronics circuits used in a computer system, it is frequently required to use a protocol or an interface standard in between a personal computer and a modem. Such a protocol is an input/output product for communication between the two essential computer elements. One of such interface standard is available from the United Microelectronics Corporation of Hsin-chu, Taiwan, under a product code of RS232. A protocol unit such as RS232 operates in between a voltage range of -12 V to +12 V. A personal computer which normally operates in between 0 V to 5 V must drive this interface standard at a much higher voltage range which in turn communicates with a modem at 9,600 bps (bits per second).
In order for a personal computer, i.e. at 0 to 5 V range, to drive an interface standard that operates in the -12 V to +12 V range, a level shift circuit must be used in between the two units.
In a conventional level shift circuit, a level shift can be executed only if a specific relationship is in existence between the voltages to be shifted. Other conventional level shift circuits, even though they do not require the special relationship between the voltages to be shifted, have a constant DC current flowing through the circuits and therefore consume a high power.
For instance, FIG. 1 shows a conventional level shift circuit 10 in which a set of voltages V.sub.1 and V.sub.2 is to be shifted to another set of voltages V.sub.3 and V.sub.4. In this conventional level shift circuit, high voltage CMOS transistors of both types--PMOS (12 and 14) and NMOS (16 and 18) are used. For the circuit shown in FIG. 1, V.sub.1, V.sub.3 &gt;V.sub.2, V.sub.4 and also V.sub.2 &lt;V.sub.4 +V.sub.th (MN1), and V.sub.2 &lt;V.sub.4 +V.sub.th (MN2). When the input potential I is V.sub.1, the control potential I' for MN2 18 is V.sub.2. The NMOS 16 (MN1) is on while the NMOS 18 (MN2) is off. (This is because V.sub.2 &lt;V.sub.4 +V.sub.th (MN2).) Since MN1 16 is on, the control potential V for MP2 14 equals V.sub.4, MP2 14 is on, and the output potential 0 equals V.sub.3. When I=V.sub.2, I'=V.sub.1, MN1 is off because V.sub.2 &lt; V.sub.4 +V.sub.th (MN1) and MN2 is on. Therefore, V.sub.4 is applied to MP1 12, it is being turned on and V=V.sub.3.
When the input potential I changes from V.sub.1 to V.sub.2, I' changes from V.sub.2 to V.sub.1. MN2 is on while MN1 is off. The voltage at V has an original value of V.sub.4, which turns on MP2 and MN2 simultaneously. The voltage at 0 point gradually decreases, such that MP1 is gradually turned on. This makes the voltage at V point increase gradually from V.sub.4, such that MP2 is gradually turned off. Until a stable condition is reached, the voltage at 0 point is V.sub.4, MP1 is completely turned on, the voltage at the V point is V.sub.3 such that MP2 is completely turned off. Since the time it takes to turn off MP2 is long, the voltage change is very slow. The same phenomenon occurs when I is changed from V.sub.2 to V.sub.1. The voltages at I, I', V and 0 plotted against time are shown in FIG. 2 that clearly demonstrates the slowness of V.sub.3 /V.sub.4 and V.sub.4 /V.sub.3 voltage shifting.
This conventional level shift circuit therefore has several shortcomings. First, the change in the voltage is very slow and therefore the data transfer rate is slow. Secondly, in order to shift the voltage level, the condition of V.sub.2 &lt;V.sub.4 +V.sub.th (MN1) and V.sub.2 &lt;V.sub.4 +V.sub.th (MN2) must be satisfied. Thirdly, the power consumption of the circuit is very large. With the present level shift circuit, it is possible to drive a 0 to 12 V circuit by a 0 to 5 V circuit. However, the 0 to 5 V circuit cannot be used to drive a -12 V to +12 V circuit.
Another conventional level shift circuit utilizing a comparator to generate the voltage shift is shown in FIG. 3. In the circuit, the voltage of V.sub.1 and V.sub.2 are shifted to V.sub.3 and V.sub.4. V.sub.1, V.sub.3 &gt;V.sub.2, V.sub.4. The voltage of V.sub.a which generates the current source must satisfy V.sub.a &gt;V.sub.4. When the voltage at point I exceeds V.sub.ref, V.sub.b is the lower voltage, by using a threshold voltage to adjust an inverter such that the output voltage at point 0 is the high voltage V.sub.3. In contrast, when the voltage at point I is less than V.sub.ref, V.sub.b is the higher voltage which is sent through an inverter such that the output voltage 0 becomes the lower voltage V.sub.4.
In this conventional level shift circuit, even though it has the benefits of not requiring a special relationship between V.sub.1, V.sub.2 and V.sub.3, V.sub.4, the circuit consumes very high power. This is because during the generation of the referenced voltage, there is a continuing DC path and furthermore, the constant need for the current source for the comparator. These two current flows contribute to a high power consumption which is the major drawback of this conventional level shift circuit. While this level shift method has improved feature compared to the first conventional method, i.e. the circuit can drive a higher voltage range, the other drawbacks of the first conventional method still exist. This makes the circuit unsuitable for applications such as in a Green PC or for a notebook PC.
It is therefore an object of the present invention to provide an improved level shift circuit that does not have the drawbacks of the prior art level shift circuits.
It is another object of the present invention to provide an improved level shift circuit that does not require a high power consumption.
It is a further object of the present invention to provide an improved level shift circuit that is capable of data transfer at a fast rate.
It is still another object of the present invention to provide an improved level shift circuit that can drive a high voltage range such as from -12 V to +12 V by a low voltage source of from 0 to 5 V.